In development using the C programming language, when we cleared the request flag using a description such as IF0 &= 0xfe;, the request flags of other bits of the same register were set during the time between reading and writing. Afterwards, these flags were cleared again during a write operation and interrupt requests could no longer be accepted.
So we changed the clearing operation to a bit manipulation instruction __asm("clr1 IF0,0"); and the operation could be accepted without any problem. Was this simply a matter of probability?
Since a FAQ contained some reference about a bit manipulation instruction resulting in a read-modify-write operation, it does not seem to be a simple matter of lowered probability.
It is not a matter of probability, and using a bit manipulation instruction eliminates the problem.