Please describe it.
The ROM correction function provides a means to correct a program previously written to ROM in a microcontroller by applying a patch to the program.
Although this function is convenient in that it can be used to correct programs already written to ROM, it cannot be used under all conditions.
Before using this function, part of the target processing must already be included in the program to be corrected, and external memory is required to read the corrected program.
ROM correction operations and their requirements are described below.
 Basic operations for ROM correction
The following is an example of ROM correction operations that occur once the required settings have been entered.
Outline of ROM correction processing in V850/S device
(1) When the CPU fetches an instruction during execution of a program, the target address for fetching is compared with the ROM correction address set in the CORADn register, and if the two addresses match, the fetched instruction is replaced by a branch instruction (JMP r0).
(2) When this branch instruction is executed, the processing up to that point is stopped and control branches to address 0.
At that time, the correction address where the match occurred is indicated by setting the corresponding bits (CORRQ0 to CORRQ3) in the CORRQ register.
(3) Since a branch is performed by the JMP r0 instruction, execution of the program starts at the entry used after an ordinary reset.
Consequently, the CORRQ register is used to determine whether a reset or ROM correction comes first.
If it is reset, then initialization processing is executed.
(4) For ROM correction, correction addresses usually can be set at several locations, so the CORRQ0 to CORRQ3 bits are used to determine which address must be matched to trigger processing, and then the corresponding program (batch processing) is executed.
(5) Once the batch processing has been completed, processing branches back to the original program.
 Hardware preparation for ROM correction
In a comparatively large system, if a bus is used to connect flash memory for external expansion, store the correction program in that flash memory.
The program can be then executed from this external expansion memory.
In a comparatively small system that does not use a bus for expansion connect an EEPROM that is controlled by a serial interface and write the correction program into it.
In such cases, the ROM correction program must be read via the serial interface and written to internal RAM during initialization processing.
 Support from initialization program
When a ROM correction occurs, the program is started from the reset entry point, so the contents of the CORRQ register must be used to determine whether or not ROM correction has occurred before initialization processing is started, as indicated in part (3) of the flowchart above.
When an ordinary reset starts the system, the CORRQ register is first cleared (to 0), and if a ROM correction occurs later, then the corresponding bits (CORRQ0 to CORRQ3) in the CORRQ register are set (to 1).
If the CORRQ register value is zero, then initialization processing is executed.
Initialization processing for ROM correction
The following description refers to this flowchart.
To enable use of external memory, the serial interface and bus interface must first be initialized.
(1) Processing of judgment as to whether or not to use ROM correction
A flag is provided to indicate whether or not ROM correction is necessary at a specified address in external memory, and this flag is checked before processing is executed.
If the ROM correction function does not need to be used, skip steps (2) to (4) below and continue with the subsequent processing.
(2) Set parameters
Read the parameters (correction addresses) required for ROM correction from external memory and set them to the CORAD register.
(3) Load correction program
Load the program to be executed for ROM correction from external memory, and write the program to the internal RAM area that will be used for actual execution of the program.
When a bus is used to connect the external memory so that the program can be executed directly from the external memory, there is no need to write it to the internal RAM.
The address of the correction program is fixed in either internal RAM or external memory and, as shown in the example below, a branch instruction is set at the start to simplify the ROM correction processing.
(4) CORCN register settings
When the COREN0 to COREN3 bits in the CORCN register are set (to 1), the ROM correction processing corresponding to CORAD0 to CORAD3 is set as valid.
 Pre-processing for ROM correction
As was described above in part , judgment processing determines whether a reset or ROM correction processing will be executed.
If it is ROM correction processing, the following processing comes next.
(1) The CORRQ0 to CORRQ3 bits in the CORRQ register are used to determine the address (or channel) where the ROM correction occurred, then control branches to the branch instruction for the corresponding processing.
For the processing that supports ROM correction in each channel, the related CORRQ0 to CORRQ3 bits must be cleared (to 0).
 ROM correction conflicts
However, when ROM correction has been set up as an interrupt service and an interrupt occurs during ROM correction processing, it is possible that other ROM correction processing may be executed while the interrupt is being serviced.
In such cases, priority among ROM correction channels can be set by checking the CORRQ0 to CORRQ3 bits in the highest-priority channel of the program targeted for ROM correction.
Once the processing has been prioritized in this way, ROM correction processing can be performed even when an interrupt has occurred.