메인 콘텐츠로 건너뛰기
Knowledgebase
Home
Renesas Korea

What is the allowable baud rate error during UART reception? How can I calculate it?

Latest Updated:04/01/2006

Question:

What is the allowable baud rate error during UART reception? How can I calculate it?

Answer:

The allowable baud rate error can be determined by starting sampling at the center of the bit and then seeing where the stop bit position is after repeated shifting of the sampling position has occurred due to baud rate error.

In an ideal case (when there is no delay in detecting the start bit and when no setup or hold times are required for sampling), the error margin at the start bit position is 50% (in other words, the sampling position may shift up to 50% before or after the center).
The allowable baud rate error can be calculated by dividing this by the number of bits before the stop bit.



In an actual case, factors such as the sampling cycle and any setup time or hold time required for sampling must be taken into consideration, so the 50% margin may be reduced to nearly 40%, and this would be divided by the bit length to determine the allowable baud rate error.
(The amount by which the margin is decreased varies among different devices.)
Thus, the value determined in this way is an allowable error that is relative between the transmitting and receiving sides.

These values exist when the receive signal has the ideal waveform.
However, actual waveforms undergo distortion due to the effects of the transmission path.

In such cases, signal transitions are more gradual when they are near the level for start bit detection, and these waveforms are susceptible to noise, so the start bit judgment timing may vary.
Consequently, the margin at the start bit position may drop even below 40%, which would also reduce the allowable baud rate error.
As a result, operation faults can occur if the estimated allowable baud rate error is too large.

Suitable Products
RL78 Family
78K Family
V850 Family